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Gary Tuttle
247 ASC I or 335 Durham
294-1814
gtuttle@iastate.edu
Lecture: Mondays and Wednesdays from 12:05 p.m. to 12:55 p.m. in Coover 0124.
Note: Due to Covid, lecture attendance is optional and class time will be used as "office hours".
Additional office Hours (in 335 Durham):
Tue: 2:00 p.m. to 4:00 p.m.
Thu: 2:00 p.m. to 4:00 p.m.
Lab instructors: Le Wei and Laila-Parvin Poly
The lab meets in the "NSF laboratory" of the Microelectronics Research Center (MRC), located in building 1 of the Applied Sciences Complex (ASC I). Everyone will have lab once per week. Labs will last 3-4 hours each time.
The Applied Sciences Complex is located away from the main campus at the end of Scholl Road in N.W. Ames, so transportation to and from campus might be an issue for some people. (The street address is 1925 Scholl Road.) There is a free shuttle bus (schedule below) that runs between MRC and Howe Hall regularly during the week. Alternatively, you can drive or bike to MRC. If you drive, there are several metered guest parking spots, or you can obtain a parking permit. Note that any current student permit allows you to park in the MRC parking lot.
The shuttle bus travels between the Howe Hall parking lot (west side of building) to the road in front of ASC several times per day. The current (Spr 2020) schedule is give below.
7:45 a.m. | Leave ASC heading to Howe |
7:55 a.m. | Leave Howe Hall heading to ASC |
8:45 a.m. | Leave ASC heading to Howe |
8:55 a.m. | Leave Howe Hall heading to ASC |
9:45 a.m. | Leave ASC heading to Howe |
9:55 p.m. | Leave Howe Hall heading to ASC |
10:45 a.m. | Leave ASC heading to Howe |
10:55 a.m. | Leave Howe Hall heading to ASC |
noon | Leave ASC heading to Howe |
12:10 p.m. | Leave Howe Hall heading to ASC |
1:00 p.m. | Leave ASC heading to Howe |
1:10 p.m. | Leave Howe Hall heading to ASC |
2:00 p.m. | Leave ASC heading to Howe |
2:10 p.m. | Leave Howe Hall heading to ASC |
3:00 p.m. | Leave ASC heading to Howe |
3:10 p.m. | Leave Howe Hall heading to ASC |
4:00 p.m. | Leave ASC heading to Howe |
4:10 p.m. | Leave Howe Hall heading to ASC |
5:00 p.m. | Leave ASC heading to Howe |
5:10 p.m. | Leave Howe Hall heading to ASC |
6:00 p.m. | Leave ASC heading to Howe |
You will need to arrange a lab time. Lab will require approximately one half-day each week. Check your schedule and send an email to GT with three possible times, in order of preference, that you could meet during the week. Once he has everyone's options, he will form the groups and arrange the schedules. Possible lab times are:
- Monday afternoon (1:30 - 5:00)
- Monday evening (6:00 - 9:30)
- Tuesday morning (8:30 - noon)
- Tuesday afternoon (1:30 - 5:00)
- Tuesday evening (6:00 - 9:30)
- Wednesday morning (8:30 - noon)
- Wednesday afternoon (1:30 - 5:00)
- Wednesday evening (6:00 - 9:30)
- Thursday morning (8:30 - noon)
- Thursday afternoon (1:30 - 5:00)
- Thursday evening (6:00 - 9:30)
- Friday morning (8:30 - noon)
- Friday afternoon (1:30 - 5:00)
- homework - 15%
- quizzes - 20%
- Two exams - 15%
- one lab report as group leader - 15%
- lab reports as team members - 15%
- final group report - 20%
- Homework - will be assigned weekly. Typically, it will be due on Wednesday at class time. Each student must submit their own homework solution. EE 532 students will do more homework problems than the EE 432 students. Some homework will involve the use of SUPREM.
- Quizzes - are done in class. Each quiz of one numerical problem and/or a one short-answer. Each quiz should require about 10 minutes to complete. The quizzes are closed-book, but necessary formulas and data will be provided. There will be on-line practice problems that can be used to prepare for the calculation problems. The lowest two quiz scores will dropped when determining final grades. There are no make-ups for missed quizzes.
- Exams - will be held at mid-term time and during the final week. Exams will be one hour in length and will be closed-book and closed-notes. A formula sheet will be provided.
- Lab reports - see the lab groups and reports section below for details.
- The first report will describe the initial oxide growth and will be written collectively by the lab group. This first report will be evaluated, but no score will be recorded.
- The second report will cover the PWELL lithography and diffusion.
- The third report will cover the PMOS lithography and diffusion.
- The fourth report will cover the NMOS lithography and diffusion.
- The fifth report will cover the contact via lithography, metallization, and metal contact lithography steps.
At the end of the semester, each group will write a comprehensive report covering the entire CyMOS process. Basically, this will be a compilation of the information from the five interim reports along with the results of the final device testing.
- Fabrication Engineering at the Micro- and Nanoscale, Stephen Campbell (EE prof at the Univ. of Minnesota), Oxford, 2012.
- Microchip Fabrication (6th edition), Peter Van Zant (independent consultant), McGraw-Hill, 2013.
- Introduction to Microelectronic Fabrication (2nd edition), Richard Jaeger (EE prof at Auburn Univ.), Prentice Hall, 2002.
- Silicon VLSI Technology, Plummer, Deal, and Griffin (EE profs. at Stanford), Prentice Hall, 2000
- Microchip Manufacturing, Stanley Wolf (independent consultant), Lattice Press, 2004
- Semiconductor Manufacturing Technology, Michael Quirk and Julian Serda (formerly at AMD), Prentice-Hall, 2001.
Presentations (EE 532 students)
- Silicon substrate fabrication
- Memristors
- FINFETs
- MOCVD
- Atomic layer deposition (ALD)
- Aniostropic etching
- 3D-NAND
- On-chip component trimming
- Moore's Law
- MEMS
- GaN - Yixuan
- Rapid thermal annealing - Adnan M.
- Silicon-on-insulator technology - Junyao T.
- Low permittivity dielectrics
- Silicon on insulator technology
- Silicon-germanium technology and devices Rapid thermal annealing
- Perovskite solar cells
- Electron-beam lithography
- X-ray lithography
- Hafnium oxide
- Soft Lithography
- Properties of III-V compound semiconductors
- Fabrication of III-V semiconductor devices
- Epitaxy - silicon
- Epitaxy - molecular-beam epitaxy (MBE) for III-V semiconductors
Accommodations, dishonesty, safety
- If you have a documented disability and anticipate needing accommodations in this course, please make arrangements to meet with me soon. Please request that a Disability Resources staff send a SAAR form verifying your disability and specifying the accommodation you will need.
- Cheating will not be tolerated. If you are caught cheating, GT will take punitive action against you. At a minimum, this will require dropping EE 230. For egregious offenses, the Dean of Students may take further action. See the academic dishonesty page for all the unpleasant details.
- This class has a substantial hands-on laboratory section. Students will be using expensive, sensitive, and potentially hazardous test equipment. Safety in the lab is a number one priority for students and instructors and to ensure a safe laboratory experience, a brief safety presentation will be given the first day of lab. It is mandatory that all students attend this presentation. Moreover, it is expected that students follow any and all posted safety guidelines. For reference, the university has a Laboratory Safety Manual.